1. Field of the Invention
The invention relates generally to the field of audio power amplifiers, and more particularly to the field of systems and methods for minimizing a direct current (“DC”) offset in the output of class-D audio power amplifiers.
2. Background Art
A number of types of audio power amplifier designs have been developed, which have been grouped into various classes. Amplifiers in several classes, namely, class-A, class-B, class-AB and class-C, are referred to as linear power amplifiers, since the output signals generated by the amplifiers bear a generally linear relation to the input signal. Amplifiers in these classes generally make use of bipolar junction output transistors, which have fairly high power dissipation and relatively low efficiency. The relatively low efficiency generally means that relatively high power input is necessary from the power supply to enable the amplifiers to provide desired volume levels. In addition, the relatively high power dissipation generally means that relatively large and heavy heat sinks to dissipate the heat that is generated by the output transistors.
Recently, non-linear power amplifiers have been developed that have higher efficiency and lower power dissipation, thereby reducing the amount of power required from the power supply, as well as enabling the size and weight of the heat sinks that are required to dissipate the heat that is generated to be reduced. As a result, these so-called class-D power amplifiers are being used in low-power devices, such as battery-operated hand-held radio receivers and the like. In class-D amplifiers, the output transistors are typically field effect transistors (“FETs”) that are operated as switches. When an FET transistor is off, the current through it is zero, and when the transistor is on, the voltage across it is relatively low. In both cases, the transistor's power dissipation is very low, thus requiring less power from the power supply, and allowing for smaller heat sinks.
One problem that can arise in connection with class-D power amplifiers is that it is desirable to operate them at a zero-DC offset voltage level, that is, if the input signal to the power amplifier has a zero-DC voltage level with respect to ground, the output of the amplifier will also have a zero-DC offset voltage level, and if the input signal has a non-zero-DC waveform, the output waveform will also have a non-zero-DC waveform, but it will have zero-DC time average voltage level. Circuits are known that can enable a class-D power amplifier to operate at a zero-DC offset level after the amplifier has been powered on. These circuits typically determine a weighted average of the voltage level of the output signal over a period of time. The weighting is typically such as to provide higher weights for voltage levels for the times close to the point in time at which the weighted average is determined, with the weights decreasing for times further in the past. In any case, since the circuits make use of weighted time averages, they will not be effective when the power amplifier is initially powered on. As a result, when the amplifier is initially powered on, it may have a non-zero-DC output signal, which can result in a pop or thump being generated by the speaker to which the amplifier is connected. The pop or thump can be quite annoying, and can, in addition, damage components, such as speakers, to which the amplifier is attached, particularly if the amplifier has a relatively high gain.